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ARM EN0-001 Practice Test Questions Answers

Exam Code: EN0-001 (Updated 210 Q&As)
Exam Name: ARM Accredited Engineer
Last Update: 12-Jul-2025
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Questions Include:

  • Single Choice: 197 Q&A's
  • Multiple Choice: 13 Q&A's

  • EN0-001 Overview

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    EN0-001 Questions and Answers

    Question # 1

    In an operating system environment, most applications are executed in which processor mode?

    A.

    Supervisor

    B.

    IRQ

    C.

    System

    D.

    User

    Question # 2

    A message passing system between two CPUs is implemented using data stored in a shared area of memory. To pass a message, the first CPU executes the instructions:

    The second CPU receives the message using the instructions:

    On both CPUs, r1 = 0x5000 and r2 = 0x6000. At which of the points A, B, C and D must Data Memory Barrier (DMB) instructions be placed in order to ensure messages are passed reliably and efficiently?

    A.

    A only

    B.

    C only

    C.

    B and C

    D.

    A and D

    Question # 3

    In which of the following scenarios would cache maintenance operations be necessary in an ARMv7 system?

    A.

    Before executing code that uses the NEON instruction set

    B.

    Before handling an interrupt request raised by an external device

    C.

    Before checking the status of a semaphore

    D.

    Before reading cacheable memory that has been written to by an external bus master

    Question # 4

    Which instruction would be used to return from a Reset exception?

    A.

    MOVS PC, R14

    B.

    MOVSPC, R13

    C.

    Architecturally not defined

    D.

    SUBS PC, R14, #4

    Question # 5

    In Architecture ARMv7-A which one of the following has a known physical address at power-on reset?

    A.

    The exception vector table

    B.

    The Memory Management Unit (MMU) translation table

    C.

    The Stack Pointer (SP)

    D.

    The System Control Register (SCTLR)

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